Biography

With over 15 years of engineering, technical management, and intellectual property experience, primarily in the defense and aerospace sectors, Patent Agent Jeffrey Blank focuses his practice on domestic and foreign patent prosecution. His technical background includes the design, flight test, and program management of airborne communication and weapons systems for the United States military and capability development roles working with the Australian Defence Force. Mr. Blank’s background includes experience as a Patent Examiner with the United States Patent and Trademark Office, as well as patent prosecution roles where his technical knowledge and business acumen positions him as a valuable partner in building and protecting clients’ intellectual property.

Representative Experience

  • Aircraft electronic system integration and EMI qualification
  • Cockpit OLED and LCD displays
  • Radiation-hardened electronic systems
  • EO/IR cameras and tracking systems
  • Laser designators and IR countermeasures
  • Air and land based electronic warfare systems
  • 4G/LTE cellular base-stations
  • Microwave backhaul infrastructure
  • TCP/IP networking
  • Airborne and satellite communication systems
  • Weapons targeting systems
  • Cryptography and computer arithmetic
  • ASIC and FPGA development
  • PCB design, test, and qualification

Background and Credentials

Mr. Blank served in various roles at two Fortune 500 global security manufacturers in defense, aerospace, and electronics. Most recently he managed capability development programs working with the Australian Defence Force to develop infrastructure for the F-35A Joint Strike Fighter, electronic warfare systems, VIP transport aircraft, and the C-27J Battlefield Airlifter. Previous roles include technical management and flight testing of fighter electro-optical targeting systems for the United States Marine Corps, nuclear-hardened electronic system development for airborne strike platforms, airborne communication hardware engineering, EMI qualification, and FPGA and ASIC development.

In the intellectual property space as a Technical Specialist and Patent Agent Mr. Blank prepared and prosecuted applications for cellular infrastructure, aerospace, industrial control, and computer software clients. As a Patent Examiner with the United States Patent and Trademark Office, he examined computer processor and memory applications.

Education

  • University of Iowa (M.B.A.)
    • Product Management and Corporate Finance
  • Illinois Institute of Technology (M.S.)
    • Computer Engineering
  • Michigan State University (B.S.)
    • Computer Engineering

Bar Admissions

  • U.S. Patent and Trademark Office

Publications and Presentations

  • J.E. Stine, J.M. Blank, Partial Product Reduction for Parallel Cubing, Proceedings, ISVLSI ’07, IEEE Computer Society Annual Symposium on VLSI, 911, March 2007.
  • J.E. Stine, J. Grad, I. Castellanos, J. Blank, V. Dave, M. Prakash: A Framework for HighLevel Synthesis of System-on-Chip Designs, Proceedings. 2005 IEEE International Conference on Microelectronic Systems Education, 2005. 1213, June 2005.